Sr. Staff Digital Design Engineer - Memory Interface IP- HBM/DDR/LPDDR

About the Role

Job Title Sr. Staff Digital Design Engineer - Memory Interface IP- HBM/DDR/LPDDR We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent years designing ASICs that move data at speeds most people cannot fathom, and you understand that memory interface IP is where performance lives or dies. HBM, DDR, LPDDR are not just acronyms to you, they are architectures you have debugged at 2 a.m., optimized for power and timing, and shipped into production silicon that someone is using right now. You know the difference between a design that meets spec on paper and one that actually works in the lab when the signal integrity issues show up. You do not need someone to tell you what good RTL looks like. You have written enough of it to know when a module is going to cause problems three months from now, and you speak up before it gets there. Working across analog, physical design, and applications teams does not slow you down, it is where you do your best work because you understand that great IP is built at the intersections. At Synopsys, you will work on memory interface IP that powers the

Requirements & Qualifications

• Proficiency in semiconductor engineering, VLSI design, EDA tooling, or software development.

Perks & Benefits

• Direct application to Synopsys India technical talent team with anti-ghosting tracking.