SoC RTL Design - Sr Staff

About the Role

Job Title: SoC RTL Design - Sr Staff We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent years building and signing off RTL that actually ships in silicon, not just passes simulation. The difference between a design that tapes out clean and one that comes back with a respin is usually a clock domain crossing someone missed or a constraint someone wrote too loosely, and you are the engineer who catches those things before they become problems. You know that static checks are not checkbox exercises, they are conversations with the design, and you have learned to read what Spyglass is actually telling you beneath the noise. You have debugged enough CDC violations to know which ones matter and which ones are artifacts of tool setup. You have written enough SDC to know when a constraint is fighting the architecture instead of describing it. Running synthesis is not a handoff for you, it is part of how you validate that your RTL decisions were sound. You do not need someone to tell you what good looks like, you have a point of view on design quality and you are comfortable defendi

Requirements & Qualifications

• Proficiency in semiconductor engineering, VLSI design, EDA tooling, or software development.

Perks & Benefits

• Direct application to Synopsys India technical talent team with anti-ghosting tracking.