R&D Engineering, Staff Engineer (Design Verification/ VIP Verification Engineers)

About the Role

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent years building Verification IP that engineers actually trust, not just IP that passes a checklist. You know that a VIP is only as good as the edge cases it catches and the clarity it brings when something breaks at 2 a.m. in a customer lab. Debugging a protocol violation three layers deep does not frustrate you, it pulls you in because finding the root cause matters more than closing a ticket. You think in coverage metrics and corner cases. When you read a protocol spec, you are already mapping out the sequences that will stress the implementation in ways the design team has not considered yet. You have worked with NVMe, PCIe, USB, Ethernet, or similar protocols long enough to know where the gaps usually hide and what good verification architecture looks like when it scales across products and customers. Working directly with customers during deployment does not feel like a distraction, it feels like the part where you learn what actually matters. You bring tasks to closure because leaving something half done keeps you up a

Requirements & Qualifications

• Proficiency in semiconductor engineering, VLSI design, EDA tooling, or software development.

Perks & Benefits

• Direct application to Synopsys India technical talent team with anti-ghosting tracking.