R&D Engineering, Sr Manager

About the Role

Memory Design Manager We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: An experienced professional with over 10 years of expertise in memory compiler development. You have a strong background in developing CMOS embedded memories such as SP SRAM, DP SRAM, Register File, TCAM, and ROM. You are a natural leader and mentor, proactive in enhancing flows and methodologies. Your skills in designing architecture and circuit implementation, especially for ultra-high-speed, ultra-low-power, or high-density design portfolios, are exceptional. You excel in performing schematic entry, circuit simulation, layout planning and supervision, and design verification and validation. You are adept at interfacing with CAD and Frontend engineers for memory compiler automation, EDA model generation, and full verification flow. Your experience includes bit cell development and verification, as well as driving physical layout design and verification. You bring a high level of professionalism, critical and logical thinking, and a strong commitment to continuous learning. What You’ll Be Doing: Developing CMOS embedded memories such as SP S

Requirements & Qualifications

• Proficiency in semiconductor engineering, VLSI design, EDA tooling, or software development.

Perks & Benefits

• Direct application to Synopsys India technical talent team with anti-ghosting tracking.