R&D Engineering, Sr Engineer

About the Role

Alternate Job Titles Standard Cell Library Characterization Engineer We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent enough time in library characterization to know that a Liberty model is only as good as the corner cases you tested and the correlations you actually validated. You understand that when a designer's STA run fails because of a timing model mismatch, it is not just a data issue, it is hours of someone's schedule gone, and you take that seriously. You are comfortable moving between SPICE simulations, Liberty file generation, and debugging why a CCS noise model behaves differently than expected across PVT corners. When a correlation gap shows up between characterization and static timing analysis, you do not just log it, you dig in, reproduce it, and figure out what assumption broke down. You know the difference between running a characterization flow and owning it. Running it means you execute scripts. Owning it means you catch the issue before QA does, you spot the pattern in regression failures, and you know when a model needs another pass even if it techni

Requirements & Qualifications

• Proficiency in semiconductor engineering, VLSI design, EDA tooling, or software development.

Perks & Benefits

• Direct application to Synopsys India technical talent team with anti-ghosting tracking.