Digital Design, Senior Engineer

About the Role

ASIC Digital Design Engineer, Senior We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence—from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to help transform the future through continuous technological innovation.   You Are: You are a Senior ASIC Digital Design Engineer who delivers high-quality RTL for complex PCIe IP. You take a spec or micro-architecture, implement it cleanly, debug it thoroughly, and stand behind the block you own. You have proven digital design experience on SoC or IP, ideally high-speed interfaces. You understand clocks, resets, state machines, pipelines, and synthesizable coding practice. PCIe experience is a strong plus; equivalent protocol or data-path experience is welcome. You work closely with Staff and Principal engineers for your assigned subsystem features. You contribute in reviews, write maintainable RTL, and help verification reproduce and close issues.   What You'll Be Doing: Implement and own RTL for PCIe blocks and features from micro-architecture and design specs. Debug design issues in simulation and, as needed, in formal, emulation, or silicon bring-up support. Contribute to micro-architecture discussions for your blocks; document design intent and corner cases. Follow and help enforce RTL co

Requirements & Qualifications

• Proficiency in semiconductor engineering, VLSI design, EDA tooling, or software development.

Perks & Benefits

• Direct application to Synopsys India technical talent team with anti-ghosting tracking.