ASIC Digital Design, Engineer

About the Role

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent the last few years building verification environments that actually close coverage, not just pass tests. Protocols like PCIe, UCIe, or DDR are not abstract specs to you, they are state machines with edge cases you have debugged at the transaction level in Verdi. You write UVM code that other engineers can extend without breaking, and you know the difference between a scoreboard that checks transactions and one that catches the bugs that matter. You think in coverage models and assertions, not just directed tests. When documentation is incomplete or a design decision is still being debated, you ask the right questions and build test plans that close the gaps. At Synopsys, you will work on high-speed interconnect IP that ships in real silicon, and the verification you own keeps bugs out of the lab. What You'll Be Doing Own verification planning and execution for UCIe, PCIe, or DDR IP blocks, translating protocol specs into test plans, checkers, and SystemVerilog Assertions. Build and extend UVM testbenches including agents, s

Requirements & Qualifications

• Proficiency in semiconductor engineering, VLSI design, EDA tooling, or software development.

Perks & Benefits

• Direct application to Synopsys India technical talent team with anti-ghosting tracking.